Verilog by Example: A Concise Introduction for FPGA Design

On the first page the autoer explains it is not comprehensive and "you wouldn expect that for less than $20". I think I did expect more though!As an intoduction it is shallow. It covers some basics and gives very limited examples, but not really enough to work with. The verilog is a bit out of date althought he author does explain that newer versions have some differences.The first chapter on IN and OUT is pretty good as an introduction, several examples of combinatorial logic (although not really developing useful example). It also misses out the question of how those inputs and outputs from your design actually get to the opins of the device!The chapter on Clocks and registers gets us into the world of sequential logic, although actually it only gives examples of simple gates in which a clock edge triggers the logic. There is only parallel non-blocking assignments exampled, so if you want to model actual sequences you are out of luck at this point. Fairly useful but if you were expecting anything about clocks think again.Moving on we get a chapeter on state machines, the example is clumsy but adequate I suppose.Next to Modular design, in which instatiating a module within another is illustrated, and several cautions, but actually nothing really about how to do good modular desing - could of written it in 2-pages.Memories is te next chapter. The discusion of different types very briefly but essentially really says "ready your vendor's tool instructions" followed by a couple of examples of inferred memory in which you just take "pot luck" how the software implements it for you.Managing clocks chapter perhaps has the most useful discussion, explanation and walk through of the practical issues of syncronising high speed logic with distribbuted clocks - fab, but the example is just how to set up a buffer for a clock - none of the actual useful discusson is exampled at all!I/O flavour - hard to know what to say about this, he tells you ssome of the configurasiton your device might have, then really tells you to read the datasheet - he proably did enough to help you understand what to look for.A taste of simulation is I think fairly handy, basic of course but gives a solid example. Intrestingly it has some new concepts that would have helped more generally, but on which he did not develop.The final bit is some reference and odds and ends, some of which are potentially quite valuable but not particualrly explained.Overall the order of the book is reasoanble, but "concise introduction" is overstating the content. 109 pages of actual content use a mish-mash of trivial examples that are contrived to make a point and often actually poor practice, it fails to develop scale.Could you write a multiplexer, simple lookup table or something like that after reading this. Yes you could, but tha't the problem - they are fine examples for small PLDs not for FPGAs. To learn we need to see the examples developed and real problem overcome.What did I think when I'd fiished the book? "Insufficient! I need a book with more content!! Not worth the price. My advice, spend more and get something with a primer followed by serious examples.

This is a great little book as a starter for someone learning Verilog for the first time. (like me) Have also looked at a couple of other introductory volumes and this is the best. An easy relaxed style that doesn't try to overload you and isn't to dry, yet seems to cover all the basics. Enough to begin building basic circuits for FPGA and so on..A5 folio size nice and handy and easy to carry as well. - Recommended.

This is the best introductory book on Verilog. If you want to learn Verilog the easiest way then go buy it. You will not be disappointed. Of course this is just a primer and mainly fouces on design aspects of verilog not on verification/testing. This book is even better than tutorials on this subject can be found on the internet.I highly recommend it.

Great little book, plenty of examples, well-written. It's the best of my books on Verilog.

Impressed by the simplicity and structure of the book. I would have preferred more detail into testbenches of verilog.

Good introduction with enough information to explain some things I hadn't been able to understand from other sources.

This book introduces VERILOG in a really good way. I'm a total noobie in FPGA area, but this book introduces complicated stuff step-by-step. So it's really worth of this money!

I was looking for a book to help me familiarize with Verilog, being a VHDL designer.This book is exactly what I need: the chapters are focused on a single concept at time, the code provided as example is explained line by line and by the end of the explanation the concept will stick.What make me strongly suggest both this book and the author is the chapter on the Finite State Machine.It is not the usual theoretical chapter, when you are told the FSM are to be described as two or three processes.A real designer, who have been working on real projects, knows the FSM are synchronous objects and can be described with a single block.This made me exclaim:"Finally! A book based on real work".By the end of the book I could translate my VHDL codes in Verilog and see them work.It is not a complete verilog course, not it explain how digital design can be approached. It introduces Verilog and helps you write working code based on you previous experience, providing useful examples to rely on.It completely fulfills its goal.

This is the best book to learn FPGAs, in this book the author makes use of his linguistic resources to write in good English and explains the concepts with mastery. Other authors need 500 pages to explain what Mr. Readler explains in just 100 pages. In this book, each line or paragraph explains or teaches something important. I wish I could have a 500-page book on verilog by the same author. I admire him. Thank you for sharing part of your mastery in the world of FPGAs.

What can I say about this little book other than - "Wow". It's hard to believe that in such short time I could enter knowing little of Verilog and exit with the programming skills for serious work with FPGAs. It may help that I'm an experienced developer, but I'm coming from the software world and learning hardware approaches is still a challenge.The author makes a point at the very beginning which he adheres to: "This book initially strips away all but the very bare essentials to show you those fundamental aspects of the language that are universally required[...] it builds, feature-by-feature, more sophisticated capabilities."Readler maintains that approach in a concise, brief, demonstrable and digestible manner of which I am simply in awe... It's a Simon Monk style tactic that results in you learning more in 120 pages than you might from a 600 page behemoth. It starts with basic HDL, moves to clocks, demonstrates state machines and modular design, dives into memory, touches on I/O and provides a quick reference. Readler includes a lot of Verilog examples. It gets you started and then some.It is best to come into this book with a basic programming knowledge, some background on FPGAs, and a comprehension of digital logic. Readler assumes this and thus wastes no time on those fundamentals. This is a great book for people in the field who are starting with FPGAs and want a good grasp on Verilog as an HDL. I highly recommend it.

Ce livre aborde de façon simple les principes du verilog.Il se lit facilement pour peu que l'on ai un bagage minimum en anglais technique.L'auteur illustre ses exemples de façon clair et aborde un large panel de cas sans toute fois rentrer trop dans les détails.Je suis novice, donc je ne sais pas dire si c'est un excellent ouvrage ou pas, mais il permet de donner confiance et de vouloir se lancer.En cas de question je serais ravi de vous répondre si vous ne trouvez pas la réponse dans la description.Le partage d'expérience est pour moi essentiel et fait la force du commerce en ligne (entre autre).Si vous appréciez ce commentaire et que cela vous aura été utile dans votre acte d'achat (ou pas), merci de ma le faire savoir en cliquant sur OUI ci-dessous. Cela me motive à continuer ainsi, voir à étoffer et développer mes commentaires.

un libro che con eccessiva superficialita' affronta l'argomento trattato, con esempi introduttivi accettabili, ma senza poi mostrare esempi realmente interessanti e minimamente complessi. insomma un testo che può andar bene solo per uno sguardo rapido e molto superficiale al linguaggio verilog senza alcuna pretesa di approfondimento.

Provides both examples, explanation as well as practical tips. Dictates a fast pace and does not take the reader an idiot. It's a very good book for people with existing programming experience.

Great book for understanding the fundamentals of Verilog.Written very clearly with good, easy to follow examples.Recommended reading for FPGA beginners.

He seguido muchos tutoriales por internet y no hay nada como este libro para empezar con Verilog. Muy bien organizado y estructurado, y con las explicaciones justas y necesarias para ir avanzando en el complejo mundo de las FPGAs. Absolutamente recomendable.